1. Field
Example embodiments relate to an anti-fuse and methods of operating and fabricating the same, and more particularly, to a multi-level anti-fuse that may perform a multi-level program operation and methods of operating and fabricating the same.
2. Description of the Related Art
Anti-fuses may have electrical characteristics opposite to those of fuses. For example, anti-fuses, which are generally fuse devices having resistive properties, may have a higher resistance when not initially programmed, and thus, current does not flow through. On the other hand, anti-fuses may have a lower resistance when a program operation proceeds.
These anti-fuses may be used for the repair of defective cells, the storage of chip identification (ID), and circuit customization, in semiconductor devices, e.g., semiconductor memory or logic devices. For example, cells determined to be a defective cell in a plurality of cells of a memory device may be replaced with redundancy cells by anti-fuses. Thus, a yield reduction caused by the defective cells may be overcome.
An anti-fuse may have a structure in which a dielectric may be sandwiched between two conductors, for example, a capacitor structure. An anti-fuse program operation may be performed such that a high voltage may be applied to the anti-fuse, thereby causing breakdown of the dielectric between the two conductors, which results in a short circuit of the two conductors.
Thus, in semiconductor devices using anti-fuses, a voltage may be applied to both ends of the anti-fuses to induce the breakdown of the dielectric, which may be detected by a sensing amplifier. In such a structure employing anti-fuses, in general, a single anti-fuse requires a single sensing amplifier, and thus, decreasing the size of a circuit of the anti-fuses may be difficult, thereby limiting a decrease in total chip size.